1. Field of the Invention
This invention relates to the fabrication of a magnetic random access memory (MRAM) device using a magnetic tunneling junction (MTJ) cell and more particularly to a method of its fabrication that results in the elimination of electrical shorting.
2. Description of the Related Art
The magnetic tunneling junction (MTJ) device, is a form of tunneling magnetoresistive (TMR) device in which the relative orientation of uni-directional magnetic moments in parallel, vertically separated upper and lower magnetized layers, controls the flow of spin-polarized electrons tunneling through a very thin dielectric layer (the tunneling barrier layer) formed between those layers. When injected electrons pass through the upper layer they are spin polarized by interaction with the magnetic moment of that layer. The probability of such an electron then tunneling through the intervening tunneling barrier layer into the lower layer then depends on the availability of states within the lower electrode that the tunneling electron can occupy. This number, in turn, depends on the magnetization direction of the lower electrode. The tunneling probability is thereby spin dependent and the magnitude of the current (tunneling probability times number of electrons impinging on the barrier layer) depends upon the relative orientation of the magnetizations of magnetic layers above and below the barrier layer.
The MTJ cell can be used as a magnetic read head, in which configuration the magnetic moment of the lower magnetized layer is fixed (pinned) in direction, while the magnetic moment of the upper magnetized layer is free to vary continuously under the action of the magnetic field of a moving magnetic medium (i.e. a disk). In that application, therefore, the MTJ device can be viewed as a kind of variable resistor, since different relative orientations of the magnetic moments will change the magnitude of a current passing through the device.
When the MTJ cell is used as an information storage element in a magnetoresistive random access memory (MRAM) cell array, the magnetic moment of the upper layer is only allowed to have two orientations, parallel or antiparallel to the fixed magnetic moment of the lower magnetized layer. When used in this way, the cell behaves as a resistor with only two resistance values, high (antiparallel magnetic moment directions) and low (parallel magnetic moment directions), which can then be treated as logical 1 and 0.
One of the critical challenges in MRAM technology is the patterning of the MTJ stack materials to form an MRAM cell. The term “stack,” as used here, refers to the unpatterned, deposited layered structure of conducting, magnetic and dielectric materials. The phrase, “patterning of the stack,” or the like, as used here, refers to the reduction of the lateral dimensions of the stack to the desired dimensions of the cell and to providing the cell with a desired horizontal cross-sectional shape, typically accomplished by etching away portions of the stack peripherally disposed about an etch mask formed on the upper surface of the stack. Because the prior art MTJ stack includes a very thin tunneling barrier layer, typically a layer of AlOx or MgO approximately 10 to 20 angstroms in thickness, shorting or shunting of the current around the junction is a critical problem. Clearly, imprecise patterning could create shorting pathways along the lateral edges of the cell. In addition, precise control of the size and shape of the MTJ cell during its patterning is increasingly important because these factors affect the magnetic and switching properties of the cell.
In MRAM devices, the elimination of electrical shorting is vital to successful mass-production manufacturing. Among all MRAM fabrication processes, MTJ etching is perhaps the most troublesome step in terms of providing a limitation on shorting. The root cause of electrical shorting that results from this step is mainly from shorting of the MTJ dielectric tunneling barrier layer at its outside edge (the etched edge), which is partially due to either an unetched “footing” or a re-deposition of the electrically conducting byproducts resulting from the etching process. Although the footing could exist for any horizontal cross-sectional shaped device, the worst case is typically associated with the so-called C-state, which is a concave shape shown in FIGS. 1a and 1b below. This problem has been discussed in the prior art, particularly by Y. K. Ha et al., in Symp. VLSI Techn. Dig., 2004, p. 22; in M. Nakayama et al., IEEE Tran. Mag., Vol. 42, p. 2733. In addition to these discussions, the following prior art also discloses attempts to deal with the discussed problem.
U.S. Pat. No. 7,211,446 (Gaidis et al) eliminates electrical shorting due to residual material by selectively exposing portions of the free layer, then converting those portions to electrically and magnetically inactive material.
U.S. Pat. No. 6,984,529 (Stojakovic et al) teaches etching an MTJ stack using 5 etch recipes where a surface oxidation is formed after the third etch recipe and the fifth etch recipe removes redeposited materials.
U.S. Pat. No. 7,252,774 (O'Sullivan et al) discloses a selective chemical etch method for an MTJ stack.
U.S. Pat. No. 6,933,155 (Albert et al) lowers electrical shorting by forming polishing resistant structures of SiN in regions around the MTJ stack.
U.S. Patent Application 2006/0234445 (Yang-Headway) teaches forming SiN spacers on sidewalls of the MTJ stack before CMP to prevent shorting.
U.S. Patent Application 2004/0205958 (Grynkewich et al) uses sidewall spacers and a masking tab to prevent deposition of metallic particles during etching to reduce electrical shorting.
Referring to FIG. 1, there is shown a schematic sketch of a side TEM view of two MTJ cell C-state (5) in vertical cross-section having a dimension of several hundreds of nanometers. The cells have been etched by a commonly used prior-art RIE process. An arrow (10) points to the region where the etching process has left a footing.
Referring to FIG. 2, there is shown a table indicating the failure rates in PPM of MTJ cells due to electrical shorting resulting from prior-art etching methods across 49 sectors of a typical 8″ diameter production wafer. This table is shown for comparison purposes with a later table showing the results of etching processes carried out according to the method of the present invention. Although it might reasonably be assumed that a longer etching process using CF4 gas would produce a more well defined etch and eliminate both the footing and the residue, this turns out not to be the case. In fact, none of the prior arts disclosed above deal effectively with the problem. Therefore, a new method of patterning an MTJ stack is needed, if a TMJ cell of arbitrary horizontal cross-sectional shape and neither short-circuits nor footings is to be fabricated.
FIG. 3a is a schematic vertical cross-sectional view of an MTJ stack of a material structure and configuration to be patterned by the method of the present invention. The lower layer (310) is a bottom electrode for the purpose of injecting a current. On this electrode will be formed a magnetically pinned structure that comprises a seed layer (320) of NiCr, an antiferromagnetic layer (320) typically of MnPt which will serve as a pinning layer, an Ru coupled pinned layer (340) that is itself a tri-layered structure of the form CoFe/Ru/CoFe in which the first CoFe layer is pinned by the antiferromagnetic layer (320) and is then coupled to the second CoFe layer across the Ru layer. On this pinned structure is then formed the dielectric tunneling barrier layer (350) as a layer of either AlOx or MgO. On this barrier layer is then formed the magnetically free layer (360) as a layer of CoFe or NiFe. On this free layer is then formed a non-magnetic capping layer (370) as a layer of NiFeHf. On this capping layer is then formed a hard mask layer (380) as a layer of Ta.
The tunneling barrier layer or junction layer (350) is formed on the pinned layer, typically by first forming a layer of a metal such as aluminum (or magnesium) and then subjecting the aluminum (or magnesium) to oxidation.